Unit 3
Input/Output Organization
Explain Interrupt nesting?
- · Once execution of the ISR starts, the execution continuous to the completion, before the processor accepts interrupt from second device.
- · ISR are short, and the delay is acceptable to the other devices.
- · For eg think of the process that a computer keep track of the time by a real-time clock.
- · Most often the interrupt has to go to the processor.
- · It can occur while the processor is handling the execution of an interrupt of another device.
- · An interrupt request from high-priority device must be accepted while the processor is handling, lower-priority device.
- · To implement this scheme assign a priority level to the processor. It can be changed under program control.
- · Priority level of the processor = priority of the program currently being executed.
- · Processor accepts interrupts only from the higher priority devices than its own.
o
Processors
priority can be changed only by program instructions, that write into the PS.
o
And
it can be executed only when the processor is in SUPERVISOR MODE.
o
Processor
is in supervisor mode only when executing the operating system’s routine.
o
Processor
switches to the user mode before beginning to the execution of the application
program.
- · Privileged instruction = leads to execute a privileged instruction, when the processor is in user mode.
- · Multiple-priority scheme can be implemented using separate INTR, INTA for each device.
- · INT lines assigned different priority levels.
- · INT request are sent to priority arbitration circuit. Higher priority will be accepted
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